1. Field of the Invention
The present invention provides a pulse frequency modulation oscillating circuit, and more particularly, a pulse frequency modulation oscillating circuit free from noise interference, and capable of stably controlling a DC/DC converter.
2. Description of the Prior Art
In general, an electric device is composed of a variety of units. Each unit may be operated under a unique voltage level. Therefore, the electric device must include a DC (direct current) to DC voltage transformation circuit for generating expected voltage levels. According to different requirements, there are different types of DC to DC converters, and all the converters are derived from step down (buck) converters and step up (boost) converters.
Please refer to FIG. 1, which illustrates a schematic diagram of a prior art step up DC to DC converter 10. The step up DC to DC converter 10 includes a voltage source 100, an inductor 102, a switching transistor 104, a diode 106, a control circuit 108, a capacitor 110, and a load resistor 112. According to a voltage level outputted from diode 106, the control circuit 108 controls the switching transistor 104, so as to raise voltage Vin provided by the voltage source 100 to an expected value, and outputs voltage Vout with the diode 106. The operating procedure of the step up DC to DC converter 10 is as follows. When the switching transistor 104 is turned on, the diode 106 receives an inverse bias and is turned off, so that the voltage source 100 outputs and stores energy into the inductor 102. Once the switching transistor 104 is turned off, the inductor 102 will generate voltage with an opposite polarity. That is, when the switching transistor 104 is turned on, the inductor 102 stores energy from the voltage source 100, and when the switching transistor 104 is turned off, energy stored in the inductor 102 is transferred to capacitor 110 and the load resistor 112 through the diode 106. Therefore, the control circuit 108 must precisely control the ON and OFF time of the switching transistor 104.
In the prior art, the control circuit 108 can be designed according to pulse width modulation (PWM) technology or pulse frequency modulation (PFM) technology. For example, please refer to FIG. 2, which illustrates a schematic diagram of a prior art control circuit 200. The control circuit 200 is utilized for implementing the control circuit 108 in FIG. 1, and includes a comparison circuit 202, a reference voltage generator 204, a ring oscillator 206, and resistors R1 and R2. Combination of the resistors R1 and R2 is a voltage divider for transforming the voltage Vout outputted from the diode 106 into voltage Vfb for the comparison circuit 202. The comparison circuit 202 compares the voltage Vfb with a reference voltage Vref outputted from the reference voltage generator 204. According to an under-voltage signal Vcom outputted from the comparison circuit 202, the ring oscillator 206 outputs a control signal Vext to control the switching transistor 104. If the voltage Vout is lower than a target voltage level, then the voltage Vfb is smaller than the voltage Vref, the under-voltage signal Vcom becomes a high level voltage and enables the ring oscillator 206, and the control signal Vext becomes a period pulse signal to switch on and off the switching transistor 104 in turn. Oppositely, if the voltage Vout is greater than the target voltage level, then the voltage Vfb is greater than the voltage Vref, the under-voltage signal Vcom is low and turns off the ring oscillator, and the control signal Vext is also low and turns off the switching transistor 104. In such case, if the voltage Vfb is close to the voltage Vref, the under-voltage signal Vcom is quickly switched between high and low, causing the ON and OFF time of the switching transistor 104 to be too short or unstable, which generates large ripples within the voltage Vout and decreases efficiency of voltage transformation.
To improve such problem, U.S. Pat. No. 6,798,262 discloses a control circuit, which adds an OR gate into the control circuit 200 to perform an OR operation for outputting signals of the comparison circuit 202 and the ring oscillator 206, and outputting a result to the ring oscillator 206. As a result, after the signal Vext becomes high, the signal Vext must stay high for a predetermined time, and then it can be low. However, considering a situation in which the signal Vext is low, and the voltage Vfb is suddenly lower than the voltage Vref, this causes the signal Vext to be high for the predetermined time, thus the off time of the switching transistor 104 is too short, which limits the application of U.S. Pat. No. 6,798,262.